Taiwan Semiconductor Manufacturing Co.’s 2-nanometer production lineup has attracted 15 customers despite wafer prices reaching $30,000 each, signaling strong demand for the world’s most advanced chips even at unprecedented cost levels.
KLA Corp. executives disclosed that roughly 10 of those customers are high-performance computing companies designing chips for artificial intelligence applications, according to remarks from CFO Brent Higgins at the Goldman Sachs Communacopia conference on September 10. The equipment supplier’s visibility into customer pipelines provides early insight into adoption patterns for TSMC’s next-generation technology.
Apple has secured nearly half of TSMC’s initial 2nm capacity, with production scheduled to begin in the fourth quarter of 2025. The iPhone maker’s dominance mirrors its historical pattern of monopolizing cutting-edge semiconductor production, potentially constraining availability for competitors.
TSMC plans monthly output of 45,000 to 50,000 wafers by year-end, expanding to 100,000 units by 2026 across facilities in Hsinchu and Kaohsiung. The ambitious timeline reflects confidence in sustained demand despite the premium pricing that could pressure customer profit margins.
Beyond mobile processors, cloud computing giants including Google, Amazon and OpenAI are pursuing custom AI chips that may utilize the advanced node. AMD confirmed its Venice processor for 2026 will use TSMC’s 2nm technology, while NVIDIA is planning products around the process for its Rubin Ultra series.
The steep pricing represents a significant jump from 3nm wafers and tests whether customers will absorb higher costs for incremental performance improvements. While TSMC positions 2nm as delivering superior density and energy efficiency, the economics may limit broader adoption beyond companies with substantial R&D budgets and premium product positioning.
The transition to 2nm manufacturing creates cascading demand throughout the supply chain. Advanced processes require significantly more consumables, with the ratio of production wafers to regenerated wafers jumping from 1:0.8 at 28nm to as high as 1:2.7 at 2nm, according to industry suppliers.
Chemical mechanical planarization steps also multiply at advanced nodes. TSMC’s A16 process requires 77 CMP layers compared to 30-40 for 5nm chips, driving demand for polishing materials and diamond grinding wheels. Kinik Co., which supplies diamond discs for the process, reportedly holds over 80% market share in TSMC’s 2nm production line.
Construction of TSMC’s Arizona facilities is accelerating, with P3 and P4 plants slated for 2nm capabilities as the company expands U.S. production amid geopolitical pressures.
