Taiwan Semiconductor Manufacturing Co. (TSMC) is accelerating its expansion of advanced packaging production capacity to meet increasing customer demand, particularly for its CoWoS (Chip on Wafer on Substrate) technology. Speaking at SEMICON Taiwan 2024, Jun He, TSMC’s Vice President of Advanced Packaging, highlighted plans for rapid production growth, with a compound annual growth rate (CAGR) of over 50% projected through 2026.
The surge in demand stems largely from cost-reduction efforts in chiplet design, a strategy that relies heavily on advanced packaging. TSMC’s 3DFabric Alliance is a key initiative aimed at fostering ecosystem collaboration to drive further innovation in this field.
However, scaling production remains a challenge. As TSMC shortens factory build times and increases manufacturing efficiency, complexities such as chip size, tool automation, and process stability present ongoing hurdles. These difficulties, particularly in 3D IC packaging, are compounded by risks like chip misalignment and breakage during the manufacturing process.
To address these issues, TSMC is investing in automation, process control, and AI-driven quality management. With the global semiconductor market projected to reach $1 trillion by 2030, the company is betting on advanced packaging, especially for AI chips, to capture significant growth.
